位置：成果数据库 > 会议 > 会议详情页
A Fully-Integrated Reconfigurable Transceiver for Narrowband Wireless Communication in 180nm CMOS
  • 所属机构名称：清华大学
  • 会议名称：IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
  • 时间：2015.5.17
  • 成果类型：会议
  • 相关项目：射频/毫米波集成电路与无线通信系统芯片设计
同会议论文项目
射频/毫米波集成电路与无线通信系统芯片设计
期刊论文 30 会议论文 24
同项目会议论文
An 8.2 GHz Triple CouplingLow-Phase-Noise Class-F QVCO in 65nm CMOS
A Sub-GHz Low-Power Transceiver with PAPR-Tolerant Power Amplifier for 802.11ah Applications
A 0.5-30GHz Wideband Differential CMOS T/RSwitch with Independent Bias and LeakageCancellation Techn
A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication
Co-design of 60GHz wideband front-end IC with on-chip Tx/Rx switch based on passive macro-modeling
An 180nm Fully-Integrated Dual-Channel Reconfigurable Receiver For GNSS Interoperations
An Asymmetric Dual-Channel Reconfigurable Receiver for GNSS in 180nm CMOS
A Self-Healing mm-Wave Amplifier Using Digital Controlled Artificial Dielectric Transmission Lines
A Resonant-Mode Switchable VCO with 47.6-71.0 GHz Tuning Range Based on p-Type LC Network
A 60-GHz WirelessTransceiver with Dual-Mode Power Amplifier for IEEE 802.11ad in 65nm CMOS
A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication
An Integrated 60GHz 5Gb/s QPSK Transmitter with On-Chip T/R Switch and Fully-Differential PLL Freque
A Frequency DoublingTwo-Path Phased-Array FMCW Radar Transceiver in 65nm CMOS
A Multi-mode ReconfigurableLowpass/Complex Bandpass CT Sigma-Delta Modulator for Short Range Wireles
A 0.1-1.5G SDR Transmitterwith Two-Stage Harmonic Rejection Power Mixer in 65-nm CMOS
A 0.1-5.0GHz Self-Calibrated SDR Transmitter with -62.6dBc CIM3 in 65nm CMOS
An Efficiency-Enhanced 2.4GHz Stacked CMOS Power Amplifier with Mode Switching Scheme for WLAN Appli
A 54.4-mW 4th-order Quadrature Bandpass CT ΣΔ Modulator with 33-MHz BW and 10-bit ENOB for a GNSS re
Co-design of 60GHz wideband front-end IC with on-chip Tx/Rx switch based on passive macro-modeling
A Reconfigurable AnalogBaseband for Low-Power Wi-Fi Receiver
A 100M-1.5 GHzHarmonic-Rejection SDR Receiver Front-End
A 0.1-5GHz SDR Transmitter with Dual-Mode Power Amplifier and Digital-Assisted I/Q Imbalance Calibra
A 5/20MHz-BW 4.2/8.1mW CT QBP Delta-Sigma Modulator with Digital I/Q Calibration for GNSS Receivers