位置：成果数据库 > 会议 > 会议详情页
Mapping Loops of multimedia algorithms for Coarse-grained reconfigurable architectures
  • 所属机构名称：中国人民解放军国防科学技术大学
  • 会议名称：2012 2nd IEEE International Conference on Signal Processing, Communications and Computing, ICSPCC 20
  • 时间：2012
  • 成果类型：会议
  • 相关项目：基于可编程数据流计算的粗粒度可重构SoC设计方法研究
作者： Yang, Ziyu1|Zhao, Peng1|Wang, Guanwu1|Li, Sikun1|
同会议论文项目
基于可编程数据流计算的粗粒度可重构SoC设计方法研究
期刊论文 9 会议论文 12
同项目会议论文
Memory-aware Loop Paralleling for Coarse-Grained Reconfigurable Architectures
Practical and effective domain-specific function unit design for CGRA
A Reconfigurable SoC for Block Ciphers with a Programmable Data?ow Structure
A Automatic Synchronous Data-Flow Approach for A Crypto Reconfigurable SoC
A Fast and Effective Domain-Specific Design Method with a Top-down Scheme
ProDFA: Accelerating Domain Applications with a Coarse-Grained Runtime Reconfigurable Architecture
多核处理器事务级多视图协同验证环境
层次化互连结构的嵌入式可视媒体处理SoC系统的设计与实现
Reconsideration of Computing Paradigms and a Novel Reconfigurable Architecture
Equivalence Checking Between SLM and TLM Using Coverage Directed Simulation
粗粒度可重构体系结构下的存储感知循环映射