欢迎您!
东篱公司
退出
申报数据库
申报指南
立项数据库
成果数据库
期刊论文
会议论文
著 作
专 利
项目获奖数据库
位置:
成果数据库
>
会议
> 会议详情页
Instruction decode mechanism for embedded real-time Java processor JPOR-32
所属机构名称:江南大学
会议名称:2010 International Conference on Electronics and Information Engineering, ICEIE 2010
成果类型:会议
会场:Kyoto, Japan
相关项目:高可靠实时系统的计算平台(SoPC)研究
作者:
Chai, Zhilei|Zhao, Wenke|Tu, Shiliang|Hu, Guang|
同会议论文项目
高可靠实时系统的计算平台(SoPC)研究
期刊论文 39
会议论文 11
专利 6
同项目会议论文
Predictable bytecode cache with prefetch mechanism for a Java processor
Towards garbage collection mechanism for RTSJ-oriented embedded Java Processor
Memory access mechanism in embedded real-time Java processor
Image Edge Detection Based on FPGA
PDSDL: A dynamic system description language
Use object-oriented platform to facilitate FPGA-based computing in embedded systems
Implementing Quantum-behaved Particle Swarm Optimization Algorithm in FPGA for Embedded Real-time Ap
Trilobite: A natural modeling framework for processor design automation system
Dynamic electronic design automation concept, benefit and framework
Memory management in Java processor optimized for RTSJ