位置：成果数据库 > 会议 > 会议详情页
Optimizing Memory Access with Fast Address Computation on a MIPS Architecture
  • 所属机构名称：中国科学院大学
  • 会议名称：2014 9th IEEE International Conference on Networking, Architecture, and Storage
  • 时间：2014.8.6
  • 成果类型：会议
  • 相关项目：片上多核处理器硅后验证关键技术研究
同会议论文项目
片上多核处理器硅后验证关键技术研究
期刊论文 42 会议论文 15
同项目会议论文
A Scan Chain Optimization Method for Diagnosis
An Optimized Solution for Cross-Domain System Bus Transaction Processing
Luminance and Chrominance Parallelization of H.264/AVC Decoding on a Multi-core Processor
VBIW: Optimizing Indirect Branch in Dynamic Binary Translation
Exclusive Memory Scheduling for Multimedia MPSoC
Realizing Hardware Accelerated AVS Video Playback on the Godson Platform
HERMES: A Fast Cross-ISA Binary Translator with Post-Optimization
Buffer Insertion to Fix Min Timing Violation Considering Multi-mode Multi-corner Timing Constraints
Buffer Insertion to Fix Min Timing Violation Considering Multi-mode Multi-corner Timing Constrains
Archipelago: A Floorplan Optimized for Concurrent Multiple Applications on Network-on-Chip
An 8Gb/s 0.75mW/Gb/s Injection-Locked Receiver with Constant Jitter Tracking Bandwidth and Accurate
A Fault-Tolerant Java Virtual Machine Using Fast Rejuvenation for Soft-Error-Prone Systems
Stable Matching Scheduler for Single-ISA Heterogeneous Multi-core Processors
MRP: Mix Real Cores and Pseudo Cores for FPGA based Chip-multiprocessor Simulation