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Temporal Performance Degradation under RTN: Evaluation and Mitigation for Nanoscale Circuits
所属机构名称:清华大学
会议名称:IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI)
时间:2012
成果类型:会议
相关项目:面向异构多核微体系结构的物理规划研究
作者:
Luo, Hong|Wang, Yu|Cao, Yu|Xie, Yuan|Ma, Yuchun|Yang, Huazhong|
同会议论文项目
面向异构多核微体系结构的物理规划研究
期刊论文 7
会议论文 16
专利 4
同项目会议论文
Incremental 3D NoC Synthesis based on Physical-aware Router Merging Algorithm
Data Dependency Aware Prefetch Scheduling for Dynamic Partial Reconfigurable Designs
Tree-based partitioning approach for network-on-chip synthesis
Defect-Tolerant Routing Algorithm for Low Power NoCs based on Buffer-shared Router Architecture
Power-driven NoC Design Optimization with Low Swing Interconnect
Automatic enhanced CDFG generation based on runtime instrumentation
PDPR: Fine-grained placement for dynamic partially reconfigurable FPGAs
HS3DPG: Hierarchical simulation for 3D P/G network
RALP: Reconvergence-Aware Layer Partitioning for 3D FPGAs
Rethinking Thermal Via Planning with Timing-Power-Temperature Dependence for 3D ICs
ISBA: An Independent Set-Based Algorithm for Automated Partial Reconfiguration Module Generation
SMPP: Generic SAT Solver over Reconfigurable Hardware Accelerator
Thermal-aware power network design for IR drop reduction in 3D ICs
Incremental layout optimization for NoC designs based on MILP formulation
Network Flow-based Simultaneous Retiming and Slack Budgeting for Low Power Design