位置：成果数据库 > 会议 > 会议详情页
<span lang="EN-US" style="font-family: &quot;Times New Roman&quot;,&qu
  • 所属机构名称：复旦大学
  • 会议名称：2012 IEEE International Symposium on Circuits and Systems (IEEE ISCAS’12)
  • 时间：2012.5
  • 成果类型：会议
  • 相关项目：众核处理器容错性设计之研究
作者： Y. yang|Z. Shi|J. Yu|L. Zhong|X. Zeng|Z. Yu|
同会议论文项目
众核处理器容错性设计之研究
期刊论文 7 会议论文 12
同项目会议论文
<span lang="EN-US" style="font-family: &quot;Times New Roman&quot;,&qu
Implementation and optimization of 3780-point FFT on multi-core system
A hybrid router combining circuit switching and packet switching with virtual channels for on-chip n
A fast multi-core virtual platform and its application on software development
A low power register file with asynchronously controlled read-isolation and software-directed write-
H.264 Decoder on A 16-Core Processor with Shared-Memory and Massage-Passing Communications
A 65nm 39GOPS/W 24-core processor with 11Tb/s/W packet-controlled circuit-switched double-layer netw
A Secondary Synchronization Signal Detection Implementation for LTE Downlink on a Multi-coreProcesso
Time-Division-Multiplexer based routing algorithm for NoC system
A Pure Software LDPC Decoder on a Multi-core Processor Platform with Reduced Inter-processor Communi
A 2D mesh NoC with self-configurable and shared-FIFOs routers