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A fine-grained pipelined implementation for large-scale matrix inversion on FPGA
  • 所属机构名称：清华大学
  • 会议名称：8th International Symposium on Advanced Parallel Processing Technologies, APPT 2009
  • 成果类型：会议
  • 相关项目：支持高速缓存一致的片上网络关键技术研究
作者： Zhou, Jie1|Dou, Yong1|Zhao, Jianxun2|Xia, Fei1|Lei, Yuanwu1|Tang, Yuxing1|
同会议论文项目
支持高速缓存一致的片上网络关键技术研究
期刊论文 75 会议论文 63 专利 12
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