首先介绍了基于FPGA的一种RAID控制卡的原理及系统设计、印刷电路板(PCB)的具体实现。由于极卡运行在66MHz总线时钟之上,必须考虑高频下电路的性能及电路的信号完整性等,因而在PCB设计阶段对电路的仿真显得尤为重要。还将介绍基于IBIS模型的信号完整性仿真分析,并利用信号噪声分析软件(Hyperlynx)对高速电路设计中的PCB布局布线、匹配电阻设计和并行线串扰分析进行深入研究。根据仿真分析结果调整原设计,从而提高了信号质量,减少开发成本。
This paper first introduces the principle, architecture and PCB design of the RAID expansion card based on FPGA. For the main clock is 66MHz, we must care about the function and Signal Integrity (SI) of the high-speed circuit PCB design. So it focuses on the analysis of SI based on IBIS model with software Hyperiynx. Furthermore, it find a method to improve the PCp design's reliability. This paper is also valuable to electronics design.