中文摘要：

针对环形正负电子对撞机（CEPC）最内层的顶点探测器而研制的CMOS硅像素探测器已经提交首次流片。为了采集探测器的数据进而研究前端芯片的性能，基于现场可编程逻辑门阵列（FPGA）设计高速数据传输的测试系统，该系统以PCIExpress总线模式进行高速传输数据。对系统性能的测试表明：数据传输速度能达到6Gb／s，传输的数据量和误码率性能均满足CMOS硅像素探测器芯片的测试要求。

英文摘要：

The＇ Circular Electron Positron Collider （CEPC） was proposed by the Chinese high energy physics community. Prototype CMOS pixel detector for its innermost vertex detector has been designed and submitted for fabrication. To characterize the CMOS detector performance, a high - speed test system has been developed based on Field - Programmable Gate Array （FPGA） and PCI Express bus. The effective data transmission rate has been measured to be 6 Gb/s. Its capability of transmitting large data volume and low bit error rate meet the requirements for detector characterization.