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中文摘要：
图像DCT变换由于计算量大，软件实现往往难以满足实时处理的要求，基于FPGA在硬件上实现了图像的DCT变换。设计采用了2D-DCT的行列分解结构，在两级1D-DCT之间引入双RAM结构，通过乒乓操作保证了前后级DcT运算的并行性，提高了运算速度。整个模块使用VerilogHDL建模，通过ModelSim编写激励对逻辑功能进行了验证，最后在QuartusII上通过了综合编译，设计优化后下载到AlteraEP2C70F896C6芯片上进行实现。结果显示，该模块功能结构正确，可作为一个独立单元集成在图像的实时处理系统中。
英文摘要：
This paper implements Discrete Cosine Transform （DCT） of image based on Field Programmable Gate Array （FPGA）, in order to resolve the problem that software method cannot meet the demand of real-time, due to its large computation. Its design adopts row-column composition structure ：of 2D-DCT, and introducs double RAM structure between two 1D-DCT, whose computational parallelity can be guaranteed by Ping-Pong operation, and computational efficiency also can be improved. The whole module is modeled by Verilog HDL, its logic functions is verified by ModelSim. The design is successfully compiled on Quartus II and finally realized on Altera EP2C70F896C6 chip after structure optimization. The results show this design has exact functions and thus it can be used as an independent unit integrated into real-time system processing image.
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