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中文摘要：
基于双电源电压和双阈值电压技术,提出了一种优化全局互连性能的新方法.文中首先定义了一个包含互连延时、带宽和功耗等因素的品质因子用以描述全局互连特性,然后在给定延时牺牲的前提下,通过最大化品质因子求得优化的双电压数值用以节省功耗.仿真结果显示,在65nm工艺下,针对5%,10%和20%的允许牺牲延时,所提方法相较于单电压方法可分别获得27.8%,40.3%和56.9%的功耗节省.同时发现,随着工艺进步,功耗节省更加明显.该方法可用于高性能全局互连的优化和设计.
英文摘要：
Based on dual supply and dual threshold voltages technique,a novel methodology optimizing global interconnect performance in presented in this paper.The new figure of merit（FOM） is first defined as a function of bandwidth,delay and power consumption of global interconnect.Then,the optimal dual voltages can be obtained to save interconnect power by maximizing FOM function within a given delay penalty.Simulations show that in 65 nm technology,for the allowed delay penalties of 5%,10% and 20%,the proposed methodology saves 27.8%,40.3% and 56.9% power compared with the case with single supply and single threshold voltages,respectively.It can also be found that more power savings are achieved with the technology improving.The proposed methodology can be used to design and optimize global interconnects.
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