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中文摘要：
时序电路的测试序列通常由各个单故障的测试向量组成．为了减少测试时间和功耗，提出2种测试向量融合算法．借助融合灵活性的概念，2种算法按不同的方式对向量序列进行排序，并以融合深度和代价作为评判准则，构建向量的融合过程，最终生成整个电路的测试序列．该算法与已有的Greedy算法时间复杂度相同，但性能更优．在ISCAS89部分电路上的实验结果表明，采用文中算法可使平均性能分别提高4．96％和8．23％．故障仿真结果表明，文中算法的故障覆盖率有少量提高，故障分辨率变化较小．
英文摘要：
The test sequence for sequential circuits usually consists of test patterns for each single fault. Two test pattern merging algorithms are presented to reduce the depth of total test sequence and thus reduce test time and power consumption. Through the concept of merging flexibility, the proposed algorithms sort the test patterns respectively, and then progressively merge the test patterns so as to construct the total test sequence for concerned circuit. Compared to previous Greedy-based algorithm, the proposed ones can obtain better results with the same computing complexity. Experimental results on ISCAS89 benchmark circuits show that the average performance increases by 4.96% and 8. 23% respectively. The corresponding fault simulation results show that the fault coverage is a little improved and the resolution varies slightly.
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