中文摘要：

作为描述FPGA硬件资源的结构描述文件,不仅能被解析以抽取FPGA芯片内部的结构信息,并且能被转换到布线资源图以获得FPGA可编程布线资源的通用抽象模型。采用有向图来构建FPGA布线资源图和描述FPGA拓扑结构,其中FPGA的每个逻辑块端口或互连线段对应于布线资源图的顶点,FPGA的逻辑块端口与互连线段、互连线段之间的可编程通路构成了布线资源图的有向边集。然后阐述了FPGA结构描述文件到布线资源图转换系统的流程图,还给出了FPGA结构描述文件编译所需的EBNF表达式和结构线网到布线资源图的自顶向下转换算法。最后,在Windows平台下用C＋＋实现了该转换系统,并选用Virtex-6型号Slice结构测试用例,进行了FPGA结构描述文件到布线资源图的转换,验证了FPGA结构描述文件到布线资源图转换系统的正确性和有效性。

英文摘要：

The FPGA architecture description file, which describes the hardware resources, is not only used to parse for the extraction of the internal structure information inside FPGA chip, but also used to translate into the interconnection resource graph, which is the general abstract model of FPGA programmable interconnection resources. We adopt the digraph to describe the FPGA interconnection resource and the topological structure, whose vertex can be considered as the port of module or interconnection line and directed edge can be represented as the programmable channel between the ports of module with interconnection lines. Furthermore, we are not only present the workflow of the converter to translate FPGA architecture description file into interconnection resource graph, but also give the EBNF expression of the compiler and the top-down translate algorithm. Finally, we implement the converter in Windows OS and C＋ ＋. The experiment of the slice model of Xilinx＇s Virtex-6 shows that the converter could translate FPGA architecture description file into interconnection resource graph. The correctness and effectiveness of the converter based on the top-down translate algorithm is also proved by the experiment.