中文摘要：

相变存储器具有可扩展性好、单元尺寸小、静态功耗低等优点,是替代DRAM做主存的候选器件之一,但其可重复写入的次数有限。提出了一种基于DRAM写操作Cache的相变存储器主存结构,包括存储器控制器、读/写操作数据通路和标志域查找等。同时还提出了相应的调度策略,包括整体的读写调度以及基于写操作频率的替换策略等。仿真结果显示,所提出的方法可将相变存储器的寿命平均延长50%以上,同时使平均仿存延迟降低35%以上。

英文摘要：

Phase Change Memory（ PCM） has been regarded as an alternative to DRAM as main memory,due to its good scalability,small cell size and near-zero leakage power. However,the less-than-desirable write endurance of PCM remains room for improvement. In order to prolong the lifetime of PCM based main memory,this paper proposes DRAM write operation Cache and its schedule policy. Figure 1 shows the overall architecture of the proposed method. Figure 3 and figure 4 show the datapath for read operation and write operation,respectively. Figure 2 and figure 5 show the overall schedule policy and the proposed replacement policy respectively. The evaluation results show that the proposed method and schedule policy can improve the average lifetime of PCM more than 50%,while the average memory accessing delay can be reduce by 35%,which are shown in figure 6,7,and 8.