随着集成电路工艺尺寸的不断降低,电路对空间辐射引起的单粒子效应越来越敏感。为了提高电路的可靠性,基于时间和空间冗余技术提出了一种高性能的容软错误锁存器DSH-CG。该锁存器包括两个内部冗余模块和一个由C单元与保持器组成的输出级,不但可以过滤上游组合逻辑传播过来的SET脉冲,而且对SEU完全免疫。并且该锁存器适用于门控时钟电路或低频电路。SPICE仿真结果表明,与同类锁存器相比,该锁存器平均延迟增加32.4%,可过滤的SET脉冲宽度平均增加73.5%,并且功耗平均降低44.5%,功耗延迟积(PDP)平均降低31.5%,面积平均增加28.6%。
As technology size is scaling, the susceptibility of circuit to single event effect caused by space radiation is increasing. In this paper, to improve the reliability of the circuit, a high-performance soft error tolerant latch (DSH-CG) is proposed based on space and time redundancy technology. The latch is composed of two internal re- dundant modules and an output stage which consists of a C-element and a keeper. It not only can filter SET pulse propagated from the previous combinational logic stage, but also be fully immune to SEU. And the latch can be ap- plied to clock-gating circuits and low frequency circuits. The simulation results by SPICE show that compared with the similar designs 73.5% increasing on average in terms of SET pulse width can be filtered by the proposed latch by 32.4% increasing on average in terms of delay. Besides, 44.5% reduction on average in terms of power as well as 31.5% reduction on average in terms of power delay product (PDP) could be achieved by 28.6% increasing on average in terms of area overhead.