中文摘要：

研究了CMOS模拟集成电路的不同版图结构对电路性能的影响规律,探讨了不同版图结构对工艺波动的抑制作用。通过采用90 nm CMOS工艺设计了8种不同宽长比（W/L）的数模转换器（DAC）,分别利用单栅与多指栅结构实现该DAC电流源输出驱动管阵列,并将其作为研究对象进行了分析。通过分析金属氧化物半导体场效应晶体管（MOSFET）阈值电压VTH和DAC输出电压Vout的实测数据,对CMOS模拟集成电路的最优版图设计方案进行了探讨。最后,利用本研究结果设计了一款90 nm工艺的低功耗CMOS运算放大器,相比传统版图结构,该放大器的工艺波动抑制能力提高了5.87%。

英文摘要：

The influences of different layout structures on the performances of the CMOS analog integrated circuit were studied. The inhibiting ability of the different layout structures on the process variation were discussed. The layout structures of digital to analog converts（ DACs） were designed by the eight different channel width and lenth of the MOSFET in 90 nm CMOS process. And the different DACs were used as the test circuits,whose output drivers layouts were designed by single gate and multi-finger gate structure. By analyzing the experimental data of the threshold- and output-voltages,the optimal layout structure of the CMOS analog integrated circuit was discussed. Finnaly a low-power CMOS op-amp was designed by 90 nm process based on the research. And the inhibiting ability of the low-power CMOS op-amp is increased by 5. 87% compared with the traditional layout structures.