A low-jitter RF PLL frequency synthesizer with high-speed mixed-signal down-scaling circuits
- ISSN号：1674-4926
- 期刊名称：《半导体学报：英文版》
- 时间：0
- 分类：TN407[电子电信—微电子学与固体电子学] P631.43[天文地球—地质矿产勘探;天文地球—地质学]
- 作者机构：[1]Institute of RF- & OE-ICs, Southeast University, Nanjing 210096, China, [2]Institute of Sciences, PLA University of Science and Technology, Nanjing 211101, China, [3]Jiangsu Key Laboratory of ASIC Design, Nantong University, Nantong 226019, China
- 相关基金：supported by the Specialized Research Fund for the Doctoral Program of Higher Education China（No.20090092120012）; the National Natural Science Foundation of China（No.60901012）; Natural Science Foundation of Jiangsu Province China （No.BK2009153）.
关键词：
锁相环频率合成器, 混合信号, 低抖动, 电路, 缩放, 射频, 深亚微米CMOS, 可编程分频器, PLL, down-scaling circuits, prescalers, charge pump, jitter
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