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On-chip power-combining techniques for watt-level linear power amplifiers in 0.18μm CMOS
  • ISSN号:1674-4926
  • 期刊名称:《半导体学报:英文版》
  • 时间:0
  • 分类:TN722.75[电子电信—电路与系统] TN73[电子电信—电路与系统]
  • 作者机构:[1]School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, China
  • 相关基金:Project supported by the National Natural Science Foundation of China (No. 61076030).
中文摘要:

Three linear CMOS power amplifiers(PAs) with high output power(more than watt-level output power)for high data-rate mobile applications are introduced. To realize watt-level output power, there are two 2.4 GHz PAs using an on-chip parallel combining transformer(PCT) and one 1.95 GHz PA using an on-chip series combining transformer(SCT) to combine output signals of multiple power stages. Furthermore, some linearization techniques including adaptive bias, diode linearizer, multi-gated transistors(MGTR) and the second harmonic control are applied in these PAs. Using the proposed power combiner, these three PAs are designed and fabricated in TSMC0.18 m RFCMOS process. According to the measurement results, the proposed two linear 2.4 GHz PAs achieve a gain of 33.2 d B and 34.3 d B, a maximum output power of 30.7 d Bm and 29.4 d Bm, with 29% and 31.3% of peak PAE, respectively. According to the simulation results, the presented linear 1.95 GHz PA achieves a gain of37.5 d B, a maximum output power of 34.3 d Bm with 36.3% of peak PAE.

英文摘要:

Three linear CMOS power amplifiers (PAs) with high output power (more than watt-level output power) for high data-rate mobile applications are introduced. To realize watt-level output power, there are two 2.4 GHz PAs using an on-chip parallel combining transformer (PCT) and one 1.95 GHz PA using an on-chip series combining transformer (SCT) to combine output signals of multiple power stages. Furthermore, some linearization techniques including adaptive bias, diode linearizer, multi-gated transistors (MGTR) and the second harmonic control are applied in these PAs. Using the proposed power combiner, these three PAs are designed and fabricated in TSMC 0.18 μm RFCMOS process. According to the measurement results, the proposed two linear 2.4 GHz PAs achieve a gain of 33.2 dB and 34.3 dB, a maximum output power of 30.7 dBm and 29.4 dBm, with 29% and 31.3% of peak PAE, respectively. According to the simulation results, the presented linear 1.95 GHz PA achieves a gain of 37.5 dB, a maximum output power of 34.3 dBm with 36.3% of peak PAE.

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期刊信息
  • 《半导体学报:英文版》
  • 中国科技核心期刊
  • 主管单位:中国科学院
  • 主办单位:中国电子学会 中国科学院半导体研究所
  • 主编:李树深
  • 地址:北京912信箱
  • 邮编:100083
  • 邮箱:cjs@semi.ac.cn
  • 电话:010-82304277
  • 国际标准刊号:ISSN:1674-4926
  • 国内统一刊号:ISSN:11-5781/TN
  • 邮发代号:2-184
  • 获奖情况:
  • 90年获中科院优秀期刊二等奖,92年获国家科委、中共中央宣传部和国家新闻出版署...,97年国家科委、中共中央中宣传部和国家新出版署三等奖,中国期刊方阵“双效”期刊
  • 国内外数据库收录:
  • 俄罗斯文摘杂志,美国化学文摘(网络版),荷兰文摘与引文数据库,美国工程索引,美国剑桥科学文摘,英国科学文摘数据库,日本日本科学技术振兴机构数据库,中国中国科技核心期刊,中国北大核心期刊(2004版),中国北大核心期刊(2008版),英国英国皇家化学学会文摘,中国北大核心期刊(2000版)
  • 被引量:7754