为了克服基于强度调制器的相位编码光模数转换(PADC)中强度调制器的偏置点漂移和双臂结构不对称等影响,给出了一种基于相位调制器的相位编码光模数转换方案。建立了系统的理论模型,给出了实现双端口相位编码的条件;理论分析了光采样时钟幅度抖动、时间抖动,以及输入光脉冲偏振态等因素对系统性能的影响。结果表明:所提出的方案可抑制光采样时钟幅度抖动对模数转换结果造成的影响,在现有的控制精度下,有效比特(ENOB)可以达到10 bit以上。进行了单波长系统实验,在583 MS/s采样率下,有效比特为6.38 bit。与非相位编码方案相比,有效比特提高2 bit以上,验证了方案的可行性和有效性。
A phase-encoded photonic analog to digital conversion (PADC) based on phase modulator is presented, which can avoid the effects of the bias voltage drift and two-arm asymmetry in intensity modulator on the performance of PADC. The theoretical model of the PADC is built. The condition to realize ideal phase- encoded PADC based on phase modulator is obtained. The effect of polarization state, amplitude and time jitter of optical sampling clock on the system performance is analyzed. The results show that the presented scheme can restrain the effect of optical sampling clock amplitude jitter, and its effective number of bits (ENOB) can be more than 10 bit in the case with reachable control precision. The feasibility and the validity of the scheme are verified by a single-wavelength system experiment with a sampling rate of 583 MS/s. The ENOB, which is 6.38 bit, is enhanced more than 2 bit by adopting phase-encoded scheme.