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中文摘要：
在MIPS，ALPHA，SPARC和PowerPC等体系结构中，对全局变量和静态变量的访问一般采用间接寻址的方式．由于变量地址和变量值不在同一数据段，使得数据访问的局部性不好．这样，每次访问变量地址会导致大量冗余的数据cache不命中访存操作．此外，这种寻址方式会产生两条连续的有数据依赖的操作，降低了程序的指令级并行性．提出了基于反馈信息的地址寄存器提升算法（address register promotion based on feedbacks，ARPF）．该算法减少了对全局变量地址和静态变量地址的冗余访问，提高了程序的ILP（instruction level parallelism），同时避免了由于寄存器压力增加导致性能下降．在龙芯编译器上实现了该算法．实验表明ARPF对SPECCPU2000INT所有测试用例有1％～6％的性能提升．
英文摘要：
In processor architectures such as MIPS, ALPHA, SPARC and PowerPC, indirect addressing mode is always adopted to access global variables and static ones. Since the addresses of these variables and the corresponding values are in different data sections in the corresponding binary file, the data locality of the program will be very poor. As a result, accessing the read only addresses of these variables every time tends to result in non-trivial redundant data cache miss memory accesses. Moreover, such indirect addressing mode will generate two sequential load instructions which have data dependences between them. As a result, the amount of instruction level parallelism （ILP） of the program will be decreased. The authors present an address register promotion nethod based on feedbacks （ARPF） to solve the above problems. ARPF algorithm reduces the redundant accesses to the read only addresses of the global variables and static ones, increases the amount of instruction level parallelism of a program, and avoids the performance declines due to the increase in register pressure caused by register promotion. The algorithm has been implemented in the Loongson compiler for MIPS architecture. Experiments on SPEC CPU2000INT benchmarks are conducted to show that ARPF can improve the performance of all benchmarks by 1%-6%.
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