针对多核处理器的硅后调试和验证的困难,研究了克服这一困难的重要手段——对处理器片上网络(NOC)的trace信号的抓取。由于片上网络的trace数量庞大,为满足片上存储资源和trace实时导出带宽的限制,需要对trace进行压缩处理。和传统的单核或片上系统(SOC)平台不同,多核处理器的应用复杂,因而片上网络trace噪音大,分布复杂,用传统的trace压缩算法不易取得高的压缩率。针对上述特点,提出了一种多核处理器的片上网络trace的压缩方法。该方法对地址信息采用动态提取平稳数据块的方法进行分别压缩,对时间信息采用多粒度和Huffman编码结合来精确压缩,满足了多核处理器调试的需要。相比于传统的压缩算法,该方法更有针对性。多核通用处理器的片上网络trace的压缩实验表明,该方法的压缩率比已有方法高6倍。
Aiming at the fact that post-silicon verification and debugging of multi-core processors become more and more difficult, the paper studies the recording of trace signals on network-on-chip (NOC), an important approach to debugging and verifying multi-core processors. However, the traces should be compressed due to the amount of trace contents, the limitation of transfer bandwidth and the content of memory. Unlike system-on-chip (SOC) and traditional single-core processors, traces on multi-core processors' NOC are much more difficult to compress because of the vicious disturbance and complex distribution. To tackle the above diglculties, this paper proposes a novel compression method for multi-core pro- cessors. This method employs a group-filtering scheme to compress address information, and uses a multi-granularity Huffman coding scheme to compress time information. Compared with traditional methods, this method is more suitable for multi-core processors. The experimental results show that the compression ratio of this method is six times better than the traditional methods.