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中文摘要：
提出了一种高速低功耗的低压差分接口电路，它可以应用于CPU，LCD，FPGA等需要高速接口的芯片中．在发送端，一个稳定的参考电压和共模反馈电路被应用于低压差分电路中，它使得发送端能够克服电源、温度以及工艺引起的波形变化．在接收端采用了轨到轨的放大器结构，它可以工作到1．6Gb／s．芯片设计加工采用的是0．18μm CMOS工艺，芯片测试结果表明，整个发送接收端数据传输速率可以达到1．6Gb／s，同时发送和接收端的功耗分别是35和6mW．
英文摘要：
This paper describes the design of a low voltage differential signal （LVDS） transmitter and receiver with high speed and low power for CPU, LCD, FPGA, and other fast links. In the proposed transmitter, a stable reference and a common mode feedback circuit are integrated into the LVDS drivers, which enable the transmitter to tolerate variations of process, temperature, and supply voltage. The proposed receiver implements a rail-to-rail amplifier architecture that allows a 1.6Gb/s transmission. The transmitter and receiver are implemented in HJ TC 3.3V,0. 18μm CMOS technology. The experimental results demonstrate that the transmitter and receiver reach 1.6Gb/s. The transmitter and receiver pad cells exhibit a power consumption of 35 and 6mW,respectively.
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