中文摘要：

在Clenshaw’S递归算法基础上，采用奇偶双路并行和蝶型单元技术，提出一种高效的MDCT／IMDCT递归结构，将N点MDCT／IMDCT的计算周期降低到N^2／16＋2．这个递归结构具有通用性，适用于MDCT和IMDCT的计算，可提高电路结构的有效利用率．同时，其在Xilinx Virtex-Ⅱ Pro FPGA开发板上实现了256点MDCT递归电路．实验结果表明，该递归结构在运算速度、数据吞吐率和硬件利用率方面均取得较大的改进．另外，该MDCT／IMDCT电路结构可以应用在国际音频编码标准MPEG-1，MPEG-2，MPEG-4以及数字音频压缩系统Dolby AC3中．

英文摘要：

A new efficient recursive structure of MDCT/IMDCT is presented. Based on the Clenshaw＇s recursion polynomial, the number of computation cycles was reduced to N^2/16＋2 utilizing both the paralleling procedure and the butterfly unit. Furthermore, this new architecture was suitable for the computations of both MDCT and IMDCT, which improved the hardware efficiency. For verification, an experiment of a 256-point recursive MDCT on Xilinx Virtex-Ⅱ Pro FPGA was implemented. The analyzed results show that the proposed structure provides a superior performance in terms of computation speed, data throughput and hardware utilization. In addition, this MDCT/IMDCT structure can be employed in many international audio standards, such as MPEG-1, MPEG-2, MPEG-4, as well as the digital audio compression standard Dolby AC-3.