中文摘要：

该文针对由记忆多项式设计的功率放大器预失真系统,提出了一种新的分数阶记忆多项式预失真器。提出预失真多项式是在常用记忆多项式基础上,通过去掉偶数阶项增加分数阶项以提高线性化性能。文中给出了分数阶记忆多项式的表达式,并给出了相应的系数估计算法。仿真分析表明,针对Wiener-Hammerstein和记忆多项式模型的功率放大器,在两种典型记忆多项式预失真的基础上可以分别得到10dB和8dB的带外谱抑制增益。相应的FPGA实现表明该预失真多项式总体硬件资源增加的代价并不高,易于在实际系统中应用。

英文摘要：

For the high power amplifier pedistorter using memory polynomial, a novel fractional order memory polynomial predistorter is proposed. The proposed predistortion polynomial is achieved by changing the even order term to fractional order term in the memory polynomial predistorter to improve the linearization performance. Computer simulations show that the proposed polynomial predistorter can get 10 dB and 8 dB out-band suppression gain based on two typical polynomial predistorters for Wiener-Hammerstein and memory polynomial power amplifier. FPGA realization shows that its increasing cost of hardware resources is acceptable, so easiness to implemented.