为了提高芯片面积利用率,采用单区结终端扩展(JTE)与复合场板技术设计了一款700 V VDMOS的终端结构。借助Sentaurus TCAD仿真软件,研究单区JTE注入剂量、JTE窗口长度和金属场板长度与击穿电压的关系,优化结构参数,改善表面和体内电场分布,提高器件的耐压。最终在120.4?m的有效终端长度上实现了838 V的击穿电压,表面最大电场为2.03×105 V/cm,小于工业界判断器件击穿的表面最大电场值(2.5×105 V/cm),受界面态电荷的影响小,具有较高的可靠性,且与高压深阱VDMOS工艺兼容,没有增加额外的掩膜和工艺步骤。
To improve availability of .die size, a 700 V VDMOS termination structure was designed by using single-zone junction termination extension (JTE) and multiple field plate. The relationships among JTE's injection dose, its length and metal-plate length with breakdown voltage were analyzed by using simulation software Sentaurus TCAD. The parameters were optimized to improve the distribution of electric field at the surface and bulk of th.e termination. At last, the termination possesses advantages of breakdown voltage up to 838 V with the length of 120.4 μm, meanwhile, the peak of surface field achieves 2.03 × 105 V/cm, less than the criteria (2.5 ×105 V/cm) of device breakdown in industry. And interface charge has less effect on the termination. Therefore, this termination structure improves the utilization efficiency and reliability of the terminal area with good compatibility and no more extra processes.