研究数字滤波器的动机就在于它正成为一种主要的DSP操作。乘法运算是数字滤波器中的核心操作,其性能的好坏直接影响整个滤波器的特性。采用CSD编码技术来实现对数字滤波器的优化。实验结果表明,该方法的应用能提高乘累加器的运行性能,达到减少资源、优化面积的目的。数据还表明在最优状态下,CSD编码占用的资源仅仅是2C编码的26.7%,DA算法的40.7%。
The motive of digital filter research is that it is becoming a major method for digital signal processing. The performance of digital system is determined by multiplication. A set of high-efficient multipliers for FIR, based on CSD coding is presented, in which various optimized technique for digital filter is used. The experimental results show that CSD arithmetic improves the performance of multiplication, and reduces the use of resources. The results also show that CSD arithmetic only requires 26.7% of the LEs of 2C arithmetic and 40.7% ofLEs of DA arithmetic in the optimal condition.