中文摘要：

提出一种嵌入式非平衡超结器件结构，在n型外延层上通过高能注人间隔的P型埋层，形成嵌入式的超结结构。n型电荷与P区在四周形成电荷耗尽，相对于常规的超结更利于提高漂移区浓度，改善导通电阻；同时，器件的表面是完整的n型区，缓解了场氧工艺中吸硼排磷效应对超结的影响，有利于控制超结的电荷平衡。三维器件仿真结果表明，在漂移区长度为10μm时，新结构下的器件耐压达到220V，而导通电阻为常规超结LDMOST的76％。

英文摘要：

A device structure with embedded unbalanced super junction （SJ） is proposed in this paper. The spaced p-type buried layers are implemented in n-type epitaxial layer by high-en- ergy implantation process to form the embedded SJ structure. N-type charges are depleted with p region from four directions, which increases the concentration of drift region compared with con- ventional SJ structure and reduces the on-resistance. Moreover, the complete n-type surface re- lieves the influence of field oxide process on SJ, which conduces to control the charge balance of SJ. Three-dimensional device simulation results indicate that the breakdown voltage of proposed device achieves 220 V at drift length of 10μm, and the on-resistance is reduced to 76 % compared with that of conventional SJ-LDMOST.