随着超大规模集成电路设计复杂度日益增加,工艺参数变动对电路性能(如速度和功耗)的影响越来越大.文中建立了一个层次化电路时延和漏功耗分析模型;将海森矩阵的概念引人到二次模型中,并建立改进的二次模型;将电路的时延和漏功耗的对数统一用改进的二次模型拟合;将该模型应用于层次化电路时延和漏功耗分析.提出一种新颖的基于相关系数-海森矩阵的面向性能的参数约简方法,减小了计算规模,既考虑了工艺参数之间的依赖关系,又考虑到它们与高层次之间的关系,从而提高了性能预算的精确度.实验结果表明了该方法的有效性和精确性.
With the increasing complexity of VLSI designs, process variations have a growing impact on circuit performance for today's IC technologies. A hierarchical modeling for performance analysis is built in this paper. Using the Hessian matrix, improved quadratic model is defined. Circuit delay and the lognormal expansion of the leakage power are expressed as the improved quadratic model. To reduce complexity, a novel parameter reduction method based on CH (Correlation-Hessian matrix) is presented. It accounts for all correlations, from manufacturing process dependence, to high-level analysis to produce more accurate performance predictions. Experimental results indicated that the proposed method achieves high computational efficiency and accuracy.