中文摘要：

对IEEE 802.11n协议中交织与解交织的置换规律进行了研究,提出一种支持该协议全部36种交织模式的交织器硬件结构。设计技术包括：合并三次置换为一次写、读数据操作;利用置换的循环特性设计优化电路代替复杂的计算公式,产生多模地址及复用交织与解交织。FPGA实现及ASIC综合仿真结果说明,该结构相对于已有的设计能够获得更高的速度并减少芯片面积与功耗开销。在SMIC 0.13μm CMOS工艺下其综合的最高工作频率为400 MHz,对应的功耗为10.8 mW,面积为0.066 7 mm2。

英文摘要：

In the multiple-input multiple-output（MIMO） orthogonal frequency-division multiplexing based systems,interleaver and deinterleaver with multi-mode and high-speed are required.In this paper,a novel 36-mode interleaver fully compliant to IEEE 802.11n wireless local area network（WLAN） protocol is presented.Three design techniques are proposed： merging permutations,replacing arithmetic expressions with optimized circuits,and multiplexing interleaver/deinterleaver.The proposed design is implemented in both FPGA and ASIC.It achieves a reduction of silicon area and power consumption when compared with other similar works.In SMIC 0.13 ？m CMOS technology,the maximal operating frequency is synthesized 400 MHz and the corresponding power dissipation is 10.8 mW.The core size is 0.066 7 mm2.