20世纪末演化硬件技术的提出为实现硬件系统的自适应与智能化等特征提供了一种可行的新技术,现阶段电路进化是演化硬件研究的热点之一.该文引入人工经验与规则,提出一种扩展矩阵编码法,保护具有较优结构的电路个体不易被淘汰;其次,基于多目标和局部寻优技术,结合子电路杂交与单元重要性的自适应变异策略,提出了一种设计数字电路的精英池演化算法,并在可编程逻辑器件上实现电路的自主动态重构与评价等演化过程.
Evolvable hardware (EHW) refers to reconfiguration hardware design with natural algorithms, which could change its architecture and hehavior dynamically and autonomously by in- teracting with its environment. At present, the auto-design of electronic and analog circuits is one of hot issues in the field of EHW. In this paper, an elitist pool evolutionary algorithm (EPEA) with some evolution techniques is proposed to optimize the evolutionary design of logic circuits ef- ficiently. First, an extended matrix encoding method is proposed based on human experiences and principles to increase the fitness value of some evolved circuits quickly. This representation can be expected to reflect the potential performance of circuits and avoid deleting some inferior circuits with a good developing potential during the evolution. Then, a novel sub-circuit crossover operator and an adaptive mutation strategy are introduced to improve design efficiency in terms of the techniques of the multi-objective and local searching optimization. Moreover, a framework of on-line evolution is employed to implement EPEA on field-programmable gate array (FPGA). Experiments show that the proposed methods can design digital circuits automatically and efficiently.