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Design Optimization for Digital Circuits Built With Gate-All-Around Silicon Nanowire Transistors
  • ISSN号：0018-9383
  • 期刊名称：IEEE Transactions on Electron Devices
  • 时间：2012.7
  • 页码：1844-1850
  • 相关项目：新型围栅硅纳米线MOS器件的涨落性与可靠性研究
作者： Liu, Yuchao|Huang, Ru|Wang, Runsheng|Zhuge, Jing|Xu, Qiumin|Wang, Yangyuan|
同期刊论文项目
新型围栅硅纳米线MOS器件的涨落性与可靠性研究
期刊论文 8 会议论文 20
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