FPGA在实际应用中,故障发生于互连资源的概率远大于逻辑功能块其他故障概率,因而FPGA连线资源测试成为保证其在航空航天等领域高可靠性应用的极为重要的手段,对FPGA连线资源进行测试,首先要根据所要测的资源来配置电路。传统的基于HDL的配置方法存在待测资源不可控的问题,论文以Xilinx公司Spartan-3系列FPGA连线资源为研究对象,提出了一种基于XDL的FPGA配置方法,并采用BIST测试结构,通过C++代码方式生成XDL程序,实现对FPGA有CLB的行列双长线资源、有CLB的行列智能型长线资源、无CLB的行列双长线资源及无CLB行列智能型长线资源的测试,为其它测试配置电路结构的设计及其xdl程序编写奠定了基础。
FPGA is widely used in military and aerospace field and FPGA testing is the most effective means to ensure the reliability of them.Interconnect resources testing is one of the most important parts of FPGA testing since that most of the faults occur on interconnect resources.FPGA needs to be configured as specified circuits before being tested and conventional.To the problem that HDL-based configuration can not achieve controllability of the resources to be tested,a XDLbased configuration is proposed.The structure of interconnect resources of Xilinx Spartan-3FPGA and their description using XDL are studied.According to the structure of the interconnect resources,a BIST structure is built to implement the test of them.Through C++ programming,XDL programs are obtained automatically.With four configurations,the testing of hex lines across CLBs and not across CLBs as well as double line across CLBs and not across CLBs are implemented.The method could solve the problem of uncontrollability of the resources to be tested efficiently.