SiC半超结垂直双扩散金属氧化物半导体场效应管fVDMOSFET)相对于常规VDMOSFET在相同导通电阻下具有更大击穿电压.在N型外延层上进行离子注入形成半超结结构中的P柱是制造SiC半超结VDMOSFET的关键工艺.本文通过二维数值仿真研究了离子注入导致的电荷失配对4H—SiC超结和半超结VDMOSFET击穿电压的影响,在电荷失配程度为30%时出现半超结VDMOSFET的最大击穿电压.在本文的器件参数下,P柱浓度偏差导致击穿电压降低15%时,半超结VDMOSFET柱区浓度偏差范围相对于超结VDMOSFET可提高69.5%,这意味着半超结VDMOSFET对柱区离子注入的控制要求更低,工艺制造难度更低.
SiC semi-superjunction vertical double diffused MOS (VDMOSFET) has higher breakdown voltage than convention- al SiC VDMOSFET with the same on-resistance. The ion implantation to form p pillar region on N-type epilayer is a key process to form semi-superjunction stucture. The influences of charge imbalance induced by ion implantation on break- down voltages of 4H-SiC superjunction and semi-superjunction VDMOSFET are investigated through two-dimensional numerical simulation, and the largest breakdown voltage is obtained when charge imbalance is 30%. With the same structure parameters of devices, when breakdown voltage decreases by 15% due to the deviation of doping concentration in P pillars, the tolerance of doping concentration for the semi-superjunction VDMOSFET is 69.5% higher than for superjunction VDMOSFET, which means that less precise process control of ion implantation for semi-superjunction VDMOSFET will be required with less difficulty in the manufacture of pillars.