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中文摘要：
AltiVec技术是为提高PowerPC的向量处理能力而对PowerPC指令集体系结构的扩展；浮点乘加单元是向量处理单元的主要构成部分，设计一种基于AltiVec技术的向量浮点乘加单元；在基本浮点乘加器的基础上，提出了java模式下对非规格化数的预规格化处理；设计采用了一种半并行的结构，与传统的全并行结构相比可以节省一半的硬件面积；时钟频率为266MHz时，java模式下5拍可以完成，非java模式下4拍可以完成。
英文摘要：
AltiVec technology is an extension to the PowerPC Instruction Set Architecture to enhance the performance in vector process- ing. Floating-point multiply-add fused （MAF） unit is a main component of the vector processing unit. This paper presents a vector floating- point MAF unit based on AltiVec technology. Pre-normalization logic is added to traditional floating-point structure to deal with denormalized number in java mode. It also proposes a semi parallel structure to construct the vector floating-point MAF unit, and it will have a 50% reduction in area compared with traditional full-parallel structure. It need five clock cycles in java mode, four clock cycles in nonjava mode, under clock rate of 266MHZ.
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