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中文摘要：
为了有效地降低数字集成电路测试成本,提出了一种编码压缩方案和测试排序算法。这种压缩方案就是把每一个测试模式分成固定长度的块,并根据相邻测试模式的对应块是否相容和一位相异进行编码。同时采用贪婪的排序算法对编码过程中所有测试模式进行动态排序,寻找一种最佳压缩顺序,以便进一步发挥所提方案的压缩效果。文章最后给出了该方案的解压思想和实验结果,证明了该方案能够提高数据压缩率,降低附加硬件开销,优于已知的其他测试数据压缩方案。
英文摘要：
In order to reduce the cost of testing digital ICs effectively, a test data compression scheme and a test sort algorithm are proposed. On one hand, all test modules are divided into successive fixed-length blocks and corresponding blocks between both successive test modules are analyzed so as to encode them according to whether they are compatible or one-bit-dissimilarity. On the other hand, to further heighten the compression effect of the code scheme, a greedy sort algorithm is dynamically used to sort all test modules during encoding process. Finally, the decompression circuit of this code technique and the experimental results are presented, which show that it can receive high data compression ratio with a few additional hardware cost, and is superior to other existing test data compression methods.
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The Design-for-Testability Features and Test Implementation of a Giga Hertz General Purpose Micropro
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