中文摘要：

由于低压电力线网络结构的复杂性和时变性是影响电力线可靠性的关键因素,提出了基于现场可编程门阵列（FPGA）的低压电力线信道特性模型。设计了该模型的实时仿真系统,整个系统由4个模块构成,包括输入端预处理、信道模拟、输出端预处理、噪声模块,并用FPGA控制实现。利用FPGA构建电力线信道实时仿真器,满足系统实时性和设计成本上的要求。通过构建硬件仿真平台对系统进行测试,结果表明基于FPGA的电力线信道的仿真系统工作速度达到纳秒级。

英文摘要：

As the complexity and time-variability of low-voltage power line network are the key factors affecting the reliability of power line communication,a low-voltage power line channel characteristic model based on FPGA（Field Programmable Gate Array） is presented.Its real-time simulation system is designed and controlled by FPGA,which consists of four modules：input pretreatment,channel simulation,output pretreatment and noise.The power line communication real-time channel simulator is constructed with FPGA to meet the requirements of system for real-time performance and low cost.The hardware simulation platform is built for system test and results show its working speed reaches nanosecond level.