片上网络(NoC)系统级建模不仅可以提供高效的仿真环境,还可用于NoC设计空间探索研究。仿真速度是影响NoC性能的关键因素之一。设计了一种支持包-电路交换的NoC系统级模型并对其进行了优化。通过对仿真中的资源(模块数、线程数和信号数)进行定量分析,我们提出了一种弱化路由结点层次结构、进程归并和交叉开关虚拟化的优化方法。实验结果表明,优化后的仿真时间比原先最多减少了60.7%,平均减少了48.93%。
System level modeling of network on chip(NoC) can not only provide efficient simulation environment,but also be used for the NoC design space exploration.However,the simulation speed is one of the critical elements that affect on the NoC performance evaluation.A NoC system level model supporting mixed packet and circuit switching is design,and the modeling technique is optimized.First,the detailed resources such as number of modules,threads and signals are analyzed.Then a method used to reduce the resource is proposed,which is a combination of module hierarchy reduction,process merging and NoC crossbar switch virtualization.The experimental results show the effectiveness of the proposed method with a maximum reduction of 60.7% and an average of 48.93%.