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基于RIE技术的倾斜表面SOI功率器件制备技术
  • 期刊名称:固体电子学研究与进展
  • 时间:2011.6.6
  • 页码:268-273
  • 分类:TN386.1[电子电信—物理电子学] TN432[电子电信—微电子学与固体电子学]
  • 作者机构:[1]南京邮电大学电子科学与工程学院,南京210003
  • 相关基金:基金项目:国家自然科学基金项目(60806027,61076073);江苏省高校自然科学基金项目(09KJB510010);江苏省高校自然科学重大基础研究项目(08KJA510002);南通市科技项目(K2008024)
  • 相关项目:SOI功率器件横向变厚度耐压新技术的机理、工艺和模型研究
中文摘要:

对一种具有倾斜表面漂移区SOILDMOS的制造方法进行了研究,提出了多窗口反应离子刻蚀法来形成倾斜表面漂移区的新技术,建立了倾斜表面轮廓函数的数学模型,TCAD工具的2D工艺仿真证实了该技术的可行性,最终优化设计出了倾斜表面漂移区长度为15μm的SOILDMOS。数值仿真结果表明,其最优结构的击穿电压可达350V,导通电阻可达1.95Ω·mm^2,同时表现出良好的源漏输出特性。

英文摘要:

A novel manufacturing method of SO1 LDMOS with a gradient surface drift region structure was proposed. Reactive ion etching by masking a series of windows was used to fabricate such a graded drift thickness region. A numerical model was derived and a computer program was developed to optimize the sizes and locations of the windows. The validity of the model was verified by performing 2D process and device simulations using TCAD software. Finally, an SOI LDMOS with the drift region length of 15 μm was designed. Simulation by the TCAD software shows that the novel device presents a maximum breakdown voltage of 350 V and a minimum specific on-resistance of 1.95 12 Ω ·mm^2, as well as a good output characteristic.

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