针对SoC中TPRAM的面积及功耗较大问题,提出一种优化设计方法.该方法将SoC中的TPRAM替换成SPRAM,并在SPRAM外围增加读写接口转换逻辑,使替换后的RAM实现原TPRAM的功能,以保持对外接口不变.将文中方法应用于一款多核SoC芯片,该芯片经TSMC28nmHPM工艺成功流片,diesize为10.7mm×11.9mm,功耗为17.2W.测试结果表明,优化后的RAM面积减少了24.4%,功耗降低了39%.
As the area and power consumption of TP RAM in SoC are large, a new design method of optimization is proposed. In order to achieve the function of the original TP RAM and keep the external interface unchanged,TP RAM is replaced with SP RAM, and read-write interface logics of conversion are added around SP RAM. The method proposed in this paper is used in the multi core SoC chip which has been successfully taped out in TSMC 28 nm HPM process. The chip occupies 10.7 mm×11.9 mm of die area and consumes 17.2 W. The testing results indicate that the area of optimized RAMs is reduced by 24.4%, and the power saving is 39%.