中文摘要：

提出了一种降低并行ADC中比较器失调的电容平均网络。该网络由比较器的输入失调存储电容和平均电容构成。通过理论推导和ADC系统级仿真，当平均电容与输入失调存储电容取值相等时，电容平均网络可以有效抑制70％以上的INL误差和DNL误差。

英文摘要：

This paper presents a circuit design using an integrating capacitance network to reduce offset of comparators in Flash ADC. This network consists of input offset storage capacitors of comparators and averaging capacitors. Through theoretical derivation and ADC system simulation, when the average capacitance and input offset storage capacitance values are equal, the differential non-linearity （DNL） offset and the integral non-linearity（INL） offset are reduced more than 70% by applying this capacitance offset averaging network.