为了满足伺服控制系统数据读取的需求,针对基于Biss协议的高精度绝对式编码器数据提取问题,主要从硬件电路设计和软件设计两方面进行研究,给出了系统的设计方案。系统硬件系统由保护电源、差分信号接口和Biss主控制器组成,在硬件电路设计的基础上,根据Biss串行通信协议,采用FPGA实现了编码器数据读取的有限状态机。最后,在设计的硬件电路的基础上进行了编码器的数据读取实验,验证了设计的正确性,为基于Biss协议的高精度编码器在伺服控制系统中的应用提供了一定的参考。
Meeting the needs of data read in servo control system to read the absolute encoder data based on the Biss protocol,two aspects of hardware circuit design and software design are studied and a scheme is designed.System hardware system consists of power supply protection,differential signal of interface and Biss master controller.Firstly,the hardware circuit,for the encoder data reading,is designed.Secondly,A finite sate mechanism is programmed through FPGA,which is based on the Biss protocol.Finally,the design is verified by experiment,providing a certain reference for the high-precision encoder based on Biss agreement in the application of servo control system.