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一种10位200kS/s 65nm CMOS SAR ADC IP核

期刊名称：电子与信息学报, 2010, 32(12): 2993-2998. (EI: 20110213568
时间：0
分类：TN470.597[电子电信—微电子学与固体电子学] TE355.5[石油与天然气工程—油气田开发工程]
作者机构：[1]School of Microelectronics, Xidian University, Xi＇an 710071, China
相关基金：Project supported by the National Natural Science Foundation of China （Grant Nos. 60725415 and 60971066 ）.
相关项目：集成电路设计（包括ＣＡＤ）

关键词：温度分布模型, 多层互连, RLC, 热效应分析, 串扰, CMOS集成电路, 互补金属氧化物半导体, HSPICE模拟, multilevel interconnects, temperature distribution, RLC crosstalk

中文摘要：

According to the thermal profile of actual multilevel interconnects,in this paper we propose a temperature distribution model of multilevel interconnects and derive an analytical crosstalk model for the distributed resistance-inductance-capacitance (RLC) interconnect considering effect of thermal profile.According to the 65-nm complementary metal-oxide semiconductor (CMOS) process,we compare the proposed RLC analytical crosstalk model with the Hspice simulation results for different interconnect coupling conditions and the absolute error is within 6.5%.The computed results of the proposed analytical crosstalk model show that RCL crosstalk decreases with the increase of current density and increases with the increase of insulator thickness.This analytical crosstalk model can be applied to the electronic design automation (EDA) and the design optimization for nanometer CMOS integrated circuits.

英文摘要：

According to the thermal profile of actual multilevel interconnects, in this paper we propose a temperature distribution model of multilevel interconnects and derive an analytical crosstalk model for the distributed resistance inductance-capacitance （RLC） interconnect considering effect of thermal profile. According to the 65-nm complementary metal-oxide semiconductor （CMOS） process, we compare the proposed RLC analytical crosstalk model with the Hspice simulation results for different interconnect coupling conditions and the absolute error is within 6.5%. The computed results of the proposed analytical crosstalk model show that RCL crosstalk decreases with the increase of current density and increases with the increase of insulator thickness. This analytical crosstalk model can be applied to the electronic design automation （EDA） and the design optimization for nanometer CMOS integrated circuits.