由于多扫描链测试方案能够提高测试进度,更适合大规模集成电路的测试,因此提出了一种应用于多扫描链的测试数据压缩方案.该方案引入循环移位处理模式,动态调整向量,能够保留向量中无关位,增加向量的外延,从而提高向量间的相容性和反向相容性;同时,该方案还能够采用一种有效的参考向量更替技术,进一步提高向量间的相关性,减少编码位数.另外,该方案能够利用已有的移位寄存器,减少不必要的硬件开销.实验结果表明所提方案在保持多扫描链测试优势的前提下能够进一步提高测试数据压缩率,满足确定性测试和混合内建自测试.
Test schemes with multiple scan chains can speed up test schedule and are more fitting for testing VLSI, and hence a test data compression scheme is proposed and applied to multiple scan chain testing. Treatment model of cyclic shift introduced can dynamically adjust reference vectors, retain don' t care bits in vectors and increase extensions of test vectors, and thus compatibility and inverse compatibility between vectors can be heightened.At the same time, an efficient technique for replacement of reference vectors can be exploited to further heighten correlations between vectors and decrease number of code words. Moreover, existing shift registers can be utilized to lower unnecessary hardware overhead. The experiment results demonstrate that the proposed scheme can further improve test compression ratios,meet deterministic fault test and hybrid built-in serf test under maintaining advantages of multiple scan chain testing.