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CMOS有源像素传感器列级低功耗自清零ADC的设计
  • 期刊名称:CMOS有源像素传感器列级低功耗自清零ADC的设计, 数据采集与处理, 2009, Vol. 24,
  • 时间:0
  • 分类:TN43[电子电信—微电子学与固体电子学]
  • 作者机构:[1]深圳大学计算机与软件学院,深圳518060
  • 相关基金:国家自然科学基金(60872125)资助项目;美国德州仪器公司创新基金和深圳市科技项目(200706)及产学研资助项目.
  • 相关项目:基于近似重复矢量的DNA序列数据压缩算法研究
中文摘要:

设计了一个可以集成在CMOS有源像素传感器列信号处理电路中的5位逐次逼近型模数转换器。在系统的内部实现了相关双次采样电路,有效地抑制了固定噪声。前端采样器与ADC并行工作,避免了并行延时,显著地提高了信号转换速度,采样率达到了4MS/s。连续采集数据时可以根据输入信号的大小自动决定工作与否,大大地降低了系统功耗。工作时模拟部分的功耗小于300μW。采用0.35,μm CMOS工艺设计,系统的整体大小仅为25μm×1mm。

英文摘要:

As CMOS active pixel sensors allow integration of full signal processing circuits on the same subtract of sensors, this technology is used to develop new type vertex detector for particle tracking. For this purpose, a column-level 5-bit successive approximation ADC is designed and it is integrated in column signal processing circuit of CMOS active pixel sensors. The correlated double sampling circuits are realized in the inner system, the circuits can effectively reduce fixed pattern noise. The pipeline delay is avoided so that the signal converting speed is apparently improved. The sampling rate reaches 4 MS/s. When collecting data continuously, the ADC works automatically according to input signal level and the system power dissipation is reduced. The power consumption of analog components is less than 300 μW while worked. By using a 0.35 μm CMOS process design, the size of the whole system is only 25 μm× 1 mm.

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