粒子滤波算法在处理非线性、非高斯系统方面有明显的优势,但计算量大限制了其实时性的应用.针对这一问题,提出利用FPGA的高速运算和并行处理的特点实现粒子滤波算法.采用模块化设计,用verilog硬件描述语言在FPGA中实现了粒子滤波算法的各个模块的设计.设计中利用modelsim进行功能仿真和时序仿真验证.仿真结果表明:设计的粒子滤波算法各个模块工作正常,可用于非线性、非高斯系统的粒子滤波实现中.这对粒子滤波的硬件实现方面具有一定的参考价值.
Particle filter algorithm has obvious advantages in dealing with non-linear,non-Gaussian systems,but the huge amount of computation limits its real-time application.To solve the problem,this paper proposes the use of FPGA features of high-speed computing and parallel processing to achieve the particle filter algorithm.Each module of particle filter algorithm is implemented in FPGA with Verilog hardware description language,and the modules are respectively verified with functional simulation and timing simulation in Modelsim.The result shows that the designed modules of particle filter algorithm run properly,and can be used for non-linear,non-Gaussian Particle Filtering system.This paper has certain reference value for the hardware implementation of the particle filter algorithm.