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中文摘要：
浮点数求和与点积计算在科学计算，信号处理，图像处理等领域中广泛应用．对浮点和与点积计算的硬件结构进行了研究．在只有一次舍入误差的前提下，提出一种通用的浮点数求和算法和结构，利用重对阶方法，解决了多个粘贴位和尾数过抵消所产生的精度损失问题．然后将这种算法移植到浮点点积计算中．为了增加结构的通用性，将提出的结构和常用的SIMD计算单元进行结合．根据提出的算法，设计实现了FADIM和FDP4的硬件结构，和使用离散的加法器和乘法器来实现求和与点积的方法相比，计算速度分别提高了20．4%和42．1％．
英文摘要：
Floating-point（ FP ） summation and dot-product computing are widely used in many fields,such as scientific computing, digital signal processing and graphic processing. A general FP summation architecture which has one rounding error is proposed in this paper. A realignment method is employed in our architecture to eliminate the errors caused by the catastrophic cancellation or multisticky bits. Then, the architecture to computing dot-product is proposed based on the FP summation architecture. Furthermore, dotproduct is combined with a SIMD unit. Lastly, A single precision FADD4 and a FDP4 are implemented which could improve the computing speed by 20.4% and 42. 1% respectively, compared with the traditional methods which employ discrete FP adders and multipliers to achieve FP Summation and dot product.
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