设计了一种基于USB2.0和现场可编程门阵列(FPGA)技术的密码算法硬件实现平台。讨论了该平台系统架构、各层面划分及其解决方案,使用超高速集成电路硬件描述语言设计了端口复用先入先出阵列存储器、数据加密等功能模块,对平台功能进行了验证。
We propose a hardware platform to implement encryption algorithms using USB 2.0 and field programmable gate array (FPGA). The system architecture, as well as the division of different layers and its realization, is discussed. Functions of the platform are tested using a port multiplexing first input first output memory module and a data encryption module, which are developed using the VHSIC hardware description language.