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中文摘要：
基于集总式电阻-电容树形功耗模型,考虑了非均匀温度分布对互连线电阻的影响,提出了一种新的分布式互连线动态功耗解析模型,解决了集总式模型不能表征非均匀温度变化带来的电阻变化的问题,并计算了一次非理想的激励冲激下整个互连模型消耗的总能量.基于所提出的分布式互连线功耗模型,计算了纳米级互补金属氧化物半导体（CMOS）工艺典型长度互连线的Elmore延时和功耗,发现非均匀温度分布对互连功耗的影响随着互连线长度的增加而增加,单位长度功耗随着CMOS工艺特征尺寸的变化而基本不变.文中所提出的功耗模型可以用来精确估算互连线动态功耗,适用于片上网络构架中大型互连路由结构和时钟网络优化设计.
英文摘要：
Base on the lumped resistance-capacitance（RC）tree power model,a novel distributed interconnect dynamic power analytical model was proposed,which considers the effect of non-uniform temperature distribution along the interconnect.The new model overtakes the defect that the lumped model cannot represent the effect of non-uniform temperature distribution on the resistance of interconnect,and estimates the total power consumption of RC tree under a non-ideal unit step input.The proposed model is used to calculate the total power consumption of interconnect under nanometer-scale complementary metal-oxide semiconductor （CMOS） typical process. The results show that the longer the interconnected line is, the greater the effect of non- uniform temperature distribution on the power consumption is, and the dynamic power per unit length keeps constant under different processes. The proposed model can accurately calculate the dynamic power of interconnects, thus can be used to optimize design of large scale interconnect router and clock network in network-on-chip structure.
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