位置：成果数据库 > 会议 > 会议详情页
Retraining based Timing Error Mitigation forHardware Neural Networks
  • 所属机构名称：中国科学院计算技术研究所
  • 会议名称：IEEE/ACM Design, Automation, and Test in Europe (DATE)
  • 时间：2015.3.1
  • 成果类型：会议
  • 相关项目：考虑集成电路时延变异性的硅后定时验证方法
同会议论文项目
考虑集成电路时延变异性的硅后定时验证方法
期刊论文 19 会议论文 14
同项目会议论文
ProPRAM: Exploiting the transparent logic resources in Non-Volatile Memory for Near Data Computing
A case of precision-tunable STT-RAM memory design for approximate neural network
Functional test generation guided by steady-state probabilities of abstract design
HARS: A high-performance reliable routing scheme for 3D NoCs
SoftPCM: Enhancing energy efficiency and lifetime of phase change memory in video applications via a
Statistical SDFC: A metric for evaluating test quality of small delay faults
A fault criticality evaluation framework of digital systems for error tolerant video applications
A novel abstraction-guided simulation approach using posterior probabilities for verification
Path constraint solving based test generation for hard-to-reach states
RSAK: Random stream attack for phase change memory in video applications
RADAR: A Case for Retention-Aware DRAM Assembly and Repair in Future FGRDRAM Memory
A Similarity Based Circuit Partitioning andTrimming Method to Defend Against Hardware Trojans
An on-line timing error detection method for silicon debug