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Design and Implementation of Dual-port Network on Chip
所属机构名称:中国人民解放军电子工程学院
会议名称:12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
时间:2014.10.28
成果类型:会议
相关项目:复杂和高速信号处理中多核并行架构设计和算法调度问题研究
同会议论文项目
复杂和高速信号处理中多核并行架构设计和算法调度问题研究
期刊论文 63
会议论文 38
著作 2
同项目会议论文
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The Implementation of Large FFT on Homogeneous Multi-core System.
A Buffer Allocation Algorithm for Network-on-Chip with Self-similar Traffic. ICIST 2014
基于ANP指标权重的相对威胁度评估模型
An Effective List Scheduling Algorithm for Homogeneous Multi-Core Processor
A Self-Routing Omega Network
Design and Implementation of 1-D and 2-D Mixed Architecture FFT Processor in Heterogeneous Multi-co
The Studies and FPGA Implementation of Spectrum Peak Search in MUSIC Algorithm
A Self-Routing Omega Network.
An Algorithm for Scheduling Static Tasks on Fully Connected Homogenous Multiprocessors System
An Implementation of Configurable and Small-Area AES IP Core Oriented Avalon Bus
A Buffer Allocation Algorithm for Network-on-Chip with Self-similar Traffic
The Studies and FPGA Implementation of Spectrum Peak Search in MUSIC Algorithm
The Research of System-Level Modeling Technology of Mixed-Level Abstraction
The Implementation of a NoC Router Compatible with Packet Switching and Circuit Switching
The Research and FPGA Implementation of Signal Subspace Decomposition.
The Research on System-Level Modeling Technology of Mixed-Level Abstraction
A Hybrid Reconfigurable System for Parallel and Intensive Computation
Design and Implementation of a Dynamic Weight Arbiter for Networks-on-Chip
Design of a Hybrid Reconfigurable Coprocessor
Performance Analysis for Matrix-Multiplication Based on an Heterogeneous Multi-core SoC
The Implementation of MUSIC Algorithm on Heterogeneous Multi-core System
Design and Implementation of Parallel Multi-access Memory Interface
Design and Implementation of a NoC Simulator for Multiple Topologies Exploration
Design and Implementation of a Reduced Floating-Point Reconfigurable Computing Unit
Research on Optimization and Realization for FFT Processor in Heterogeneous Multi-Core SoC
The Design for High Speed LVDS Transceiver on FPGA
VLSI Implementation of Fast Integer-Pixel Motion Estimation Algorithm Based on H.264
Design and Implementation of a Reduced Floating-Point Unit
Design and Implementation of Dual-port Network on Chip
The Implementation of Large FFT on Heterogeneous Multi-core System
The Research of System-Level Modeling Technology of Mixed-Level Abstraction
The Implementation of MUSIC Algorithm on Heterogeneous Multi-core System
VLSI Implementation of Fast Integer-Pixel Motion Estimation Algorithm Based on H.264